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this is information on a product in full production. june 2014 docid14914 rev 2 1/15 l6386ad high voltage high and low-side driver datasheet - production data features ? high voltage rail up to 600 v ? dv/dt immunity 50 v/nsec in full temperature range ? driver current capability ? 400 ma source ? 650 ma sink ? switching times 50/30 nsec rise/fall with 1 nf load ? cmos/ttl schmitt trigger inputs with hysteresis and pull-down ? undervoltage lockout on lower and upper driving section ? integrated bootstrap diode ? outputs in phase with inputs applications ? home appliances ? induction heating ? industrial applications and drives ? motor drivers ? sr motors, ? dc, ac, pmdc and pmac motors ? asymmetrical half-bridge topologies ? hvac ? lighting applications ? factory automation ? power supply systems description the l6386ad is a high voltage gate driver, manufactured with the bcd? ?offline? technology, and able to drive simultaneously one high and one low-side power mos or igbt device. the high-side (floating) section is enabled to work with voltage rail up to 600 v. both device outputs can independently sink and source 650 ma and 400 ma respectively and can be simultaneously driven high. the l6386ad device provides two input pins, two output pins and an enable pin (sd), and guarantees the outputs switch in phase with inputs. the logic inputs are cmos/ttl compatible to ease the in terfacing with controlling devices. the l6386ad integrates a comparator (inverting input internally referenced to 0.5 v) that can be used to protect the device against fault events, like overcurrent. the diag output is a diagnostic pin, driven by the comparator, and used to signal a fault event occurrence to the controlling device. the bootstrap diode is integrated in the driver allowing a more compact and reliable solution. the l6386ad device features the uvlo protection on both supply voltages (v cc and v boot ) ensuring greater protection against voltage drops on the supply lines. the device is available in a so-14 package, in tube, and tape and reel packaging. so-14 table 1. device summary order codes package packaging l6386ad so-14 tube L6386AD013TR so-14 tape and reel www.st.com
contents l6386ad 2/15 docid14914 rev 2 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 ac operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 dc operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.3 timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 c boot selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
docid14914 rev 2 3/15 l6386ad block diagram 15 1 block diagram figure 1. block diagram logic uv detection level shifter uv detection r r s v cc lvg driver v cc hin sd hvg driver hvg h.v. to load out lvg pgnd d97in520d lin diag vref + - bootstrap driver vboot cin c boot sgnd 5 7 6 8 9 12 13 14 1 2 3 4
electrical data l6386ad 4/15 docid14914 rev 2 2 electrical data 2.1 absolute maximum ratings 2.2 thermal data 2.3 recommended operating conditions table 2. absolute maximum ratings symbol parameter value unit v out output voltage -3 to v boot - 18 v v cc supply voltage - 0.3 to +18 v v boot floating supply voltage -1 to 618 v v hvg high-side gate output voltage - 1 to v boot v v lvg low-side gate output voltage -0.3 to v cc +0.3 v v i logic input voltage -0.3 to v cc +0.3 v v diag open drain forced voltage -0.3 to v cc +0.3 v v cin comparator input voltage -0.3 to 10 v v dv out /dt allowed output slew rate 50 v/ns p tot total power dissipation (t j = 85 c) 750 mw t j junction temperature 150 c t stg storage temperature -50 to 150 c table 3. thermal data symbol parameter so-14 unit r th(ja) thermal resistance junction to ambient 165 c/w table 4. recommended operating conditions symbol pin paramete r test condition min. typ. max. unit v out 12 output voltage (1) 1. if the condition v boot - v out < 18 v is guaranteed, v out can range from -3 to 580 v. 580 v v bs (2) 2. v bs = v boot - v out . 14 floating supply voltage (1) 17 v f sw switching frequency hvg, lvg load c l = 1 nf 400 khz v cc 4 supply voltage 17 v t j junction temperature -45 125 c
docid14914 rev 2 5/15 l6386ad electrical data 15 2.4 pin connection figure 2. pin connection (top view) table 5. pin description no. pin type function 1 lin i low-side driver logic input 2 sd (1) 1. the circuit guarantees 0.3 v maximum on the pin (at isink = 10 ma), with v cc > 3 v. this allows to omit the ?bleeder? resistor connected between the gate and the s ource of the external mosfet normally used to hold the pin low; the gate driver assure s low impedance also in sd condition. i shutdown logic input 3 hin i high-side driver logic input 4 v cc p low voltage supply 5 diag o open drain diagnostic output 6 cin i comparator input 7 sgnd p ground 8 pgnd p power ground 9 lvg (1) o low-side driver output 10, 11 n.c. not connected 12 out p high-side driver floating driver 13 hvg (1) o high-side driver output 14 v boot p bootstrapped supply voltage lin sd hin v cc diag sgnd cin 1 3 2 4 5 6 7 pgnd n.c. lvg n.c. out hvg v boot 14 13 12 11 10 8 9 d97in521a
electrical characteristics l6386ad 6/15 docid14914 rev 2 3 electrical characteristics 3.1 ac operation 3.2 dc operation table 6. ac operation electrical characteristics (v cc = 15 v; t j = 25 c) symbol pin parameter test condition min. typ. max. unit t on 1, 3 vs. 9, 13 high/low-side driver turn-on propagation delay v out = 0 v 110 150 ns t off high/low-side driver turn-off propagation delay 110 150 ns t sd 2 vs. 9,13 shutdown to high/low-side propagation delay 105 150 t r 9, 13 rise time c l = 1000 pf 50 ns t f fall time c l = 1000 pf 30 ns table 7. dc operation electrical characteristics (v cc = 15 v; t j = 25 c) symbol pin parameter test condition min. typ. max. unit low supply voltage section v ccth1 4 v cc uv turn-on threshold 9.1 9.6 10.1 v v ccth2 v cc uv turn-off threshold 7.9 8.3 8.8 v v cchys v cc uv hysteresis 1.3 v i qccu undervoltage quiescent supply current v cc ?? 9 v 200 ? a i qcc quiescent current v cc = 15 v 250 320 ? a bootstrapped supply section v bth1 14 v boot uv turn-on threshold 8.5 9.5 10.5 v v bth2 v boot uv turn-off threshold 7.2 8.2 9.2 v v bhys v boot uv hysteresis 1.3 v i qboot v boot quiescent current hvg on 200 ? a i lk high voltage leakage current v hvg = v out = v boot = 600 v 10 ? a r ds(on) bootstrap driver on-resistance (1) v cc ?? 12.5 v v in = 0 v 125 ? driving buffers section i so 9, 13 high/low-side source short-circuit current v in = v ih (t p < 10 ? s) 300 400 ma i si 9, 13 high/low-side sink short-circuit current v in = v il (t p < 10 ? s) 500 650 ma
docid14914 rev 2 7/15 l6386ad electrical characteristics 15 3.3 timing diagram figure 3. input/output timing diagram symbol pin parameter test condition min typ max unit logic inputs v il 1, 2, 3 low level logic voltage 1.5 v v ih high level logic voltage 3.6 v i ih high level logic input current v in = 15 v 50 70 ? a i il low level logic input current v in = 0 v 1 ? a sense comparator v io input offset voltage -10 10 mv i io 6 input bias current v cin ?? 0.5 0.2 ? a v ol 2 open drain low level output voltage i od = -2.5 ma 0.8 v v ref comparator reference voltage 0.46 0.50 0.54 v 1. r ds(on) is tested in the following way: where i 1 is the pin 14 current when v cboot = v cboot1 , i 2 when v cboot = v cboot2 . table 7. dc operation electrical characteristics (continued) (v cc = 15 v; t j = 25 c) r dson v cc v cboot1 ? ?? v cc v cboot2 ? ?? ? i 1 v cc ,v cboot1 ?? i 2 v cc ,v cboot2 ?? ? ------------------------------------------------------------------------------------------------------ - = hin lin sd hout lout v ref v cin diag note: sd active condition is latched until next negative in edge. d97in522a
bootstrap driver l6386ad 8/15 docid14914 rev 2 4 bootstrap driver a bootstrap circuitry is needed to supply the high voltage section. this function is normally accomplished by a high voltage fast recovery diode ( figure 4 a). in the l6386ad device a patented integrated structure replaces the exte rnal diode. it is realized by a high voltage dmos, driven synchronously with the low-side driver (lvg), with a diode in series, as shown in figure 4 b. an internal charge pump ( figure 4 b) provides the dmos driving voltage. the diode connected in series to the dmos has been added to avoid undesirable turn-on. c boot selection and charging to choose the proper c boot value, the external mos can be seen as an equivalent capacitor. this capacitor c ext is related to the mos total gate charge: equation 1 the ratio between the capacitors c ext and c boot is proportional to the cyclical voltage loss. it has to be: cboot>>>cext e.g.: if q gate is 30 nc and v gate is 10 v, c ext is 3 nf. with c boot = 100 nf the drop would be 300 mv. if hvg has to be supplied for a long time, the c boot selection has to take into account also the leakage losses. e.g.: hvg steady state consumption is lower than 200 ? a, so if hvg t on is 5 ms, c boot has to supply 1 ? c to c ext . this charge on a 1 ? f capacitor means a voltage drop of 1 v. the internal bootstrap driver gives great adv antages: the external fast recovery diode can be avoided (it usually has a great leakage current). this structure can work only if v out is close to gnd (or lower) and in the meanwhile the lvg is on. the charging time (t charge ) of the c boot is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. the bootstrap driver introduces a voltage drop due to the dmos r ds(on) (typical value: 125 ? ). at low frequency this drop can be negl ected. anyway increasing the frequency it must be taken into account. the following equation is useful to compute the drop on the bootstrap dmos: equation 2 where qgate is the gate charge of the external power mos, r dson is the on-resistance of the bootstrap dmos, and t charge is the charging time of the bootstrap capacitor. c ext q gate v gate -------------- - = v drop i ch e arg r dson v drop ? q gate t ch e arg ------------------- r dson ==
docid14914 rev 2 9/15 l6386ad bootstrap driver 15 for example: using a power mos with a total gate charge of 30 nc, the drop on the bootstrap dmos is about 1 v, if the t charge is 5 ms. in fact: equation 3 v drop has to be taken into account when the voltage drop on c boot is calculated: if this drop is too high, or the circuit topology doesn?t allo w a sufficient charging time, an external diode can be used. figure 4. bootstrap driver v drop 30nc 5 ? s -------------- - 125 ? 0.8v ? ? = to load d99in1056 h.v. hvg ab lvg hvg lvg c boot to load h.v. c boot d boot v boot v s v s v out v boot v out
typical characteristic l6386ad 10/15 docid14914 rev 2 5 typical characteristic figure 5. typical rise and fall times vs. load capacitance figure 6. quiescent current vs. supply voltage figure 7. turn-on time vs. temperature figure 8. v boot uv turn-on threshold vs. temperature figure 9. turn-off time vs. temperature figure 10. v boot uv turn-off threshold vs. temperature for both high and low side buffers @25?c tamb 0 1 2 3 4 5 c (nf) 0 50 100 150 200 250 time (nsec) tr d99in1054 tf 0 246810121416v s (v) 10 10 2 10 3 10 4 iq ( a) d99in1057 -45 -25 0 25 50 75 100 125 0 50 100 150 200 250 ton (ns) tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 7 8 9 10 11 12 13 14 15 vbth1 (v) tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 0 50 100 150 200 250 toff (ns) tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 7 8 9 10 11 12 13 14 15 vbth2 (v) tj (c) typ. @ vcc = 15v
docid14914 rev 2 11/15 l6386ad typical characteristic 15 figure 11. shutdown time vs. temperature figure 12. v boot uv hysteresis figure 13. v cc uv turn-on threshold vs. temperature figure 14. output source current vs. temperature figure 15. v cc uv turn-off threshold vs. temperature figure 16. output sink current vs. temperature -45 -25 0 25 50 75 100 125 0 50 100 150 200 250 tsd (ns0 tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 1 1.5 2 2.5 3 vbhys (v) tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 9 10 11 12 13 14 15 vccth1(v) tj (c) typ. -45 -25 0 25 50 75 100 125 0 200 400 600 800 1000 current (ma) tj (c) typ. @ vcc = 15v -45 -25 0 25 50 75 100 125 7 8 9 10 11 12 vccth2(v) tj (c) typ. -45-250 255075100125 0 200 400 600 800 1000 current (ma) tj (c) typ. @ vcc = 15v
typical characteristic l6386ad 12/15 docid14914 rev 2 figure 17. v cc uv hysteresis vs. temperature -45 -25 0 25 50 75 100 125 1 1.5 2 2.5 3 vcchys (v) tj (c) typ.
docid14914 rev 2 13/15 l6386ad package information 15 6 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. figure 18. so-14 package outline table 8. so-14 package mechanical data symbol dimensions (mm) dimensions (inch) min. typ. max. min. typ. max. a 1.35 1.75 0.053 0.069 a1 0.10 0.30 0.004 0.012 a2 1.10 1.65 0.043 0.065 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.007 0.01 d (1) 1. ?d? dimension does not include mold flash, protrusion s or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side. 8.55 8.75 0.337 0.344 e 3.80 4.0 0.150 0.157 e 1.27 0.050 h 5.8 6.20 0.228 0.244 h 0.25 0.50 0.01 0.02 l 0.40 1.27 0.016 0.050 k 0 (min.), 8 (max.) ddd 0.10 0.004
revision history l6386ad 14/15 docid14914 rev 2 7 revision history table 9. document revision history date revision changes 14-jul-2008 1 first release 20-jun-2014 2 added section : applications on page 1 . updated section : description on page 1 (replaced by new description). updated table 1: device summary on page 1 (moved ?table 9 order codes? from page 15 to page 1, renamed title of table 1 ). updated figure 1: block diagram on page 3 (moved to page 3, added section 1: block diagram on page 3 ). updated section 2.1: absolute ma ximum ratings on page 4 (removed note below table 2: absolute maximum ratings ). updated table 5: pin description on page 5 (updated ?type? of several pins). numbered equation 1 on page 8 , equation 2 on page 8 and equation 3 on page 9 . updated section 6: package information on page 13 (updated ecopack text, updated/added titles, reversed order of figure 18 and table 8 (numbered table 8 ), removed 3d package figure, minor modifications]. minor modifications throughout document.
docid14914 rev 2 15/15 l6386ad 15 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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